A multilevel converter is an apparatus for converting a direct current into an alternating current that presents multiple levels as time changes, an alternating current that presents multiple levels as time changes into a direct current, a direct current into a direct current, or an alternating current into an alternating current. The multilevel converter is mainly applied to fields such as speed regulation of a motor with a high voltage and large power, reactive power compensation, or active filtering. The alternating current generally refers to a sine wave or square wave of 220 Volts (V) and 50 Hertz (Hz), and the direct current may refer to direct current electrical energy provided by a battery, an accumulator jar, or the like.
The multilevel converter may implement output of three levels by using a diode-clamped T-type three-level topology, and may further implement output of a larger number of levels by adding a power semiconductor device on the basis of the diode-clamped T-type three-level topology or by using low-level topologies a serial connection. However, a whole topology of the multilevel converter has relatively high control logic complexity.
In the prior art, to decrease the control logic complexity of the whole topology of the multilevel converter, the multilevel converter may further implement output of three levels by connecting two two-level-input bridge arms in an interleaved parallel manner, and enabling, within a period of working time of the multilevel converter, switching transistors of the two interleaved parallel two-level-input bridge arms, to be connected or disconnected alternatively. In addition, each bridge arm is connected to a coupled inductor, and the coupled inductors are connected in series by connecting or disconnecting the switching transistors of the two bridge arms alternatively to implement filtering and ripple elimination for an output level signal, where each bridge arm includes two switching transistor. If the multilevel converter needs to implement output of a larger number of levels, more two-level-input bridge arms may be connected in an interleaved parallel manner on the basis of the two two-level-input bridge arms, so as to implement output of multiple levels, and implement filtering and ripple elimination for an output level signal together with the coupled inductor. However, when more two-level-input bridge arms are connected in an interleaved parallel manner to implement output of multiple levels, the number of connections between the bridge arms and the coupled inductor increases, for example, when four two-level-input bridge arms are connected in an interleaved parallel manner to implement output of seven levels, four connections are required for the four two-level-input bridge arms and the coupled inductor, thereby causing relatively high processing complexity of the coupled inductor and a relatively complex circuit structure.